1226 search results - page 144 / 246 » Designing systems-on-chip using cores |
ISCAS
2006
IEEE
15 years 7 months ago
2006
IEEE
— The implementation of a high-performance network-on-chip (NoC) requires an efficient design for the network interface unit (NIU) that connects the switched network to the IP c...
115
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DATE
2005
IEEE
15 years 7 months ago
2005
IEEE
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
DFT
2005
IEEE
15 years 7 months ago
2005
IEEE
This paper presents a new test methodology which utilizes the Programming Language Interface (PLI) for performing fault simulation of combinational or full scan Intellectual Prope...
129
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IPPS
2005
IEEE
15 years 7 months ago
2005
IEEE
This paper presents a hardware architecture for Multi Protocol Label Switching (MPLS). MPLS is a protocol used primarily to prioritize internet traffic and improve bandwidth utili...
122
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IWSOC
2005
IEEE
15 years 7 months ago
2005
IEEE
A fully programmable radio baseband processor architecture is presented. The architecture is based on a DSP processor core and a number flexible accelerators, connected via a con...