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» Designing systems-on-chip using cores
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PPOPP
2010
ACM
15 years 10 months ago
Application heartbeats for software performance and health
Adaptive, or self-aware, computing has been proposed to help application programmers confront the growing complexity of multicore software development. However, existing approache...
Henry Hoffmann, Jonathan Eastep, Marco D. Santambr...
IPPS
2010
IEEE
14 years 11 months ago
Improving the performance of Uintah: A large-scale adaptive meshing computational framework
Abstract--Uintah is a highly parallel and adaptive multiphysics framework created by the Center for Simulation of Accidental Fires and Explosions in Utah. Uintah, which is built up...
Justin Luitjens, Martin Berzins
132
Voted
ISCAS
2011
IEEE
278views Hardware» more  ISCAS 2011»
14 years 5 months ago
A programmable axonal propagation delay circuit for time-delay spiking neural networks
— we present an implementation of a programmable axonal propagation delay circuit which uses one first-order logdomain low-pass filter. Delays may be programmed in the 550ms rang...
Runchun Wang, Craig T. Jin, Alistair McEwan, Andr&...
BMCBI
2011
14 years 5 months ago
A user-friendly web portal for T-Coffee on supercomputers
Background: Parallel T-Coffee (PTC) was the first parallel implementation of the T-Coffee multiple sequence alignment tool. It is based on MPI and RMA mechanisms. Its purpose is t...
Josep Rius Torrento, Fernando Cores, Francesc Sols...
ASPLOS
2009
ACM
16 years 2 months ago
Mixed-mode multicore reliability
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...