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» Designing systems-on-chip using cores
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WSC
2004
15 years 2 months ago
An Architecture for Distributed Simulation Games
In this paper we present an architecture for internet-mediated simulation games. The challenge was to use today's state of the art technologies to provide a simulated environ...
Stijn-Pieter A. van Houten, Peter H. M. Jacobs
CN
2007
96views more  CN 2007»
15 years 1 months ago
Persistent detection and recovery of state inconsistencies
Soft-state is a well established approach to designing robust network protocols and applications. However it is unclear how to apply soft-state approach to protocols that must mai...
Lan Wang, Daniel Massey, Lixia Zhang
NGITS
1995
Springer
15 years 5 months ago
A History-Oriented Temporal SQL Extension
Dozens of temporal extension of the relational data model and of the query language SQL have appeared in recent years. Recently, a committee formed by researchers from the academi...
Fabio Grandi, Maria Rita Scalas, Paolo Tiberio
ERSA
2008
130views Hardware» more  ERSA 2008»
15 years 2 months ago
Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs
Coarse-grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine for various types of System-on-Ch...
Masaru Kato, Yohei Hasegawa, Hideharu Amano
PPOPP
2010
ACM
15 years 10 months ago
Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs?
Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also r...
Eddy Z. Zhang, Xipeng Shen, Yunlian Jiang