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» Designing systems-on-chip using cores
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ECAI
2010
Springer
15 years 2 months ago
Parallel TBox Classification in Description Logics - First Experimental Results
Abstract. One of the most frequently used inference services of description logic reasoners classifies all named classes of OWL ontologies into a subsumption hierarchy. Due to emer...
Mina Aslani, Volker Haarslev
SIGARCH
2008
96views more  SIGARCH 2008»
15 years 1 months ago
Towards hybrid last level caches for chip-multiprocessors
As CMP platforms are widely adopted, more and more cores are integrated on to the die. To reduce the off-chip memory access, the last level cache is usually organized as a distribu...
Li Zhao, Ravi Iyer, Mike Upton, Don Newell
TPDS
2010
174views more  TPDS 2010»
14 years 11 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
EDBT
2009
ACM
186views Database» more  EDBT 2009»
15 years 8 months ago
Automating the loading of business process data warehouses
Business processes drive the operations of an enterprise. In the past, the focus was primarily on business process design, modeling, and automation. Recently, enterprises have rea...
Malú Castellanos, Alkis Simitsis, Kevin Wil...
DAC
2009
ACM
16 years 2 months ago
Spectral techniques for high-resolution thermal characterization with limited sensor data
Elevated chip temperatures are true limiters to the scalability of computing systems. Excessive runtime thermal variations compromise the performance and reliability of integrated...
Ryan Cochran, Sherief Reda