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» Designing systems-on-chip using cores
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SIGIR
2006
ACM
15 years 7 months ago
Large scale semi-supervised linear SVMs
Large scale learning is often realistic only in a semi-supervised setting where a small set of labeled examples is available together with a large collection of unlabeled data. In...
Vikas Sindhwani, S. Sathiya Keerthi
CHI
2009
ACM
15 years 6 months ago
StoryBank: mobile digital storytelling in a development context
Mobile imaging and digital storytelling currently support a growing practice of multimedia communication in the West. In this paper we describe a project which explores their bene...
David M. Frohlich, Dorothy Rachovides, Kiriaki Rig...
CODES
2009
IEEE
15 years 5 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
CSCL
2008
106views more  CSCL 2008»
15 years 1 months ago
Operationalizing macro-scripts in CSCL technological settings
: This paper presents a conceptual analysis of the technological dimensions related to the operationalization of CSCL macro-scripts. CSCL scripts are activity models that aim at en...
Pierre Tchounikine
CCS
2010
ACM
14 years 10 months ago
Practical leakage-resilient pseudorandom generators
Cryptographic systems and protocols are the core of many Internet security procedures (such as SSL, SSH, IPSEC, DNSSEC, secure mail, etc.). At the heart of all cryptographic funct...
Yu Yu, François-Xavier Standaert, Olivier P...