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» Designing systems-on-chip using cores
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CISIS
2010
IEEE
15 years 8 months ago
Threaded Dynamic Memory Management in Many-Core Processors
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
Edward C. Herrmann, Philip A. Wilsey
HOTI
2008
IEEE
15 years 7 months ago
Network Processing on an SPE Core in Cell Broadband Engine
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
Yuji Kawamura, Takeshi Yamazaki, Hiroshi Kyusojin,...
ALGORITHMICA
2006
86views more  ALGORITHMICA 2006»
15 years 1 months ago
Slabpose Columnsort: A New Oblivious Algorithm for Out-of-Core Sorting on Distributed-Memory Clusters
Our goal is to develop a robust out-of-core sorting program for a distributed-memory cluster. The literature contains two dominant paradigms for out-of-core sorting algorithms: me...
Geeta Chaudhry, Thomas H. Cormen
ICCD
2000
IEEE
96views Hardware» more  ICCD 2000»
15 years 5 months ago
AMULET3: A 100 MIPS Asynchronous Embedded Processor
AMULET3 is a 32-bit asynchronous processor core that is fully instruction set compatible with the clocked ARM cores. It represents the culmination of ten years of research and dev...
Stephen B. Furber, David A. Edwards, Jim D. Garsid...
ICS
2010
Tsinghua U.
15 years 10 months ago
Cache Replacement Policies for Multicore Processors
Almost all of the modern computers use multiple cores, and the number of cores is expected to increase as hardware prices go down, and Moore's law fails to hold. Most of the ...
Avinatan Hassidim