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» Designing systems-on-chip using cores
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AHS
2007
IEEE
239views Hardware» more  AHS 2007»
15 years 5 months ago
Separation of Data flow and Control flow in Reconfigurable Multi-core SoCs using the Gannet Service-based Architecture
This paper presents a mechanism for the separation of control and data flow in NoC-based SoCs consisting of multiple heterogeneous reconfigurable IP cores. This mechanism enables ...
Wim Vanderbauwhede
IJVR
2006
178views more  IJVR 2006»
15 years 1 months ago
Scene Synchronization in Close Coupled World Representations Using SCIVE
This paper introduces SCIVE, a Simulation Core for Intelligent Virtual Environments. SCIVE provides a Knowledge Representation Layer (KRL) as a central organizing struc...
Marc Erich Latoschik, Christian Fröhlich, Ale...
DATE
2008
IEEE
75views Hardware» more  DATE 2008»
15 years 7 months ago
Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization
With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperat...
Srinivasan Murali, Almir Mutapcic, David Atienza, ...
EDBT
2002
ACM
92views Database» more  EDBT 2002»
16 years 1 months ago
XQuery by the Book: The IPSI XQuery Demonstrator
The IPSI XQuery Demonstrator (IPSI-XQ) implements the XQuery surface syntax, its mapping to the XQuery Core Language, and the static and dynamic semantics of XQuery Core "by t...
Peter Fankhauser, Tobias Groh, Sven Overhage
CODES
2006
IEEE
15 years 7 months ago
Heterogeneous multiprocessor implementations for JPEG: : a case study
Heteregenous multiprocessor SoCs are becoming a reality, largely due to the abundance of transistors, intellectual property cores and powerful design tools. In this project, we ex...
Seng Lin Shee, Andrea Erdos, Sri Parameswaran