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» Designing systems-on-chip using cores
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ASAP
2008
IEEE
142views Hardware» more  ASAP 2008»
15 years 7 months ago
Managing multi-core soft-error reliability through utility-driven cross domain optimization
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
Wangyuan Zhang, Tao Li
SIGPLAN
2002
15 years 1 months ago
A rule-based language for programming software updates
We describe the design of a rule-based language for expressing changes to Haskell programs in a systematic and reliable way. The update language essentially offers update commands...
Martin Erwig, Deling Ren
DATE
2007
IEEE
89views Hardware» more  DATE 2007»
15 years 7 months ago
Cyclostationary feature detection on a tiled-SoC
In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, th...
André B. J. Kokkeler, Gerard J. M. Smit, Th...
DAMON
2006
Springer
15 years 5 months ago
Realizing parallelism in database operations: insights from a massively multithreaded architecture
A new trend in processor design is increased on-chip support for multithreading in the form of both chip multiprocessors and simultaneous multithreading. Recent research in databa...
John Cieslewicz, Jonathan W. Berry, Bruce Hendrick...
ASPDAC
2005
ACM
122views Hardware» more  ASPDAC 2005»
15 years 3 months ago
A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lind...