1226 search results - page 62 / 246 » Designing systems-on-chip using cores |
141
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CODES
1998
IEEE
15 years 5 months ago
1998
IEEE
The implementation of codesign applications generally requires the use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Interfacing hardwar...
106
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PDP
2010
IEEE
15 years 5 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
118
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ISCA
2005
IEEE
15 years 7 months ago
2005
IEEE
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...
123
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SPAA
2012
ACM
13 years 3 months ago
2012
ACM
We present a highly-scalable non-blocking producer-consumer task pool, designed with a special emphasis on lightweight synchronization and data locality. The core building block o...
133
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SIGCSE
2012
ACM
13 years 9 months ago
2012
ACM
The computing landscape is shifting towards mobile devices. To learn about operating systems, it is increasingly important for students to gain hands-on kernel programming experie...