Run-time Partial Reconfiguration (PR) speed is significant in applications especially when fast IP core switching is required. In this paper, we propose to use Direct Memory Acce...
Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsc...
This paper presents an optimized design approach of two’s complement large-size squarers using embedded multipliers in FPGAs. The realization is based on BaughWooley’s algorit...
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
This paper describes how design information, in our case UML specifications, can be used to evolve a software system and validate the consistency of such an evolution. This work c...
Procurement for e-Government is an important part of activities which are similar to the nature of B2B. That is usually characterized by bulk volumes with complex variables, burea...