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» Designing systems-on-chip using cores
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ICCD
2008
IEEE
420views Hardware» more  ICCD 2008»
15 years 10 months ago
Frequency and voltage planning for multi-core processors under thermal constraints
— Clock frequency and transistor density increases have resulted in elevated chip temperatures. In order to meet temperature constraints while still exploiting the performance op...
Michael Kadin, Sherief Reda
AES
2008
Springer
97views Cryptology» more  AES 2008»
15 years 1 months ago
Software mechanisms for extensible and scalable 3D visualization of construction operations
This paper presents research that led to the design and implementation of an extensible and scalable software framework for the dynamic 3D visualization of simulated construction ...
Vineet R. Kamat, Julio C. Martínez
ICCD
2007
IEEE
205views Hardware» more  ICCD 2007»
15 years 10 months ago
Hardware libraries: An architecture for economic acceleration in soft multi-core environments
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
David Meisner, Sherief Reda
IEEECIT
2010
IEEE
14 years 12 months ago
The Curriculum Reform of Database System Principle Based on Paperless Examination Platform
—Database technology is the significant part of computer science and technology, as the core technology of information management, database technology is widely used in the field...
Haifeng Ke, Gaoyan Zhang, Minghui Wu
DATE
2006
IEEE
135views Hardware» more  DATE 2006»
15 years 7 months ago
FPGA architecture characterization for system level performance analysis
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...