The suggestion that the body surface might be used as an additional means of presenting information to human-machine operators has been around in the literature for nearly 50 year...
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
The miniaturization of transistors in recent technology nodes requires tremendous back-end tuning and optimizations, making bug fixing at later design stages more expensive. Ther...
Three-dimensional ICs promise to significantly extend the scale of system integration and facilitate new-generation electronics. However, progress in commercial 3D ICs has been s...