521 search results - page 92 / 105 » Designing technology to aid cognition |
FPGA
2010
ACM
15 years 6 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
GLVLSI
2008
IEEE
15 years 4 months ago
2008
IEEE
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
CHI
2009
ACM
15 years 10 months ago
2009
ACM
Florian `Floyd' Mueller Distance Lab Horizon Scotland The Enterprise Park Forres, Moray IV36 2AB UK floyd@exertioninterfaces.com Stefan Agamanolis Distance Lab Horizon Scotlan...
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ISPD
2007
ACM
14 years 11 months ago
2007
ACM
When VLSI technology scales toward 45nm, the lithography wavelength stays at 193nm. This large gap results in strong refractive effects in lithography. Consequently, it is a huge...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...