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NOCS
2007
IEEE
16 years 15 days ago
Implementation and Evaluation of a Dynamically Routed Processor Operand Network
— Microarchitecturally integrated on-chip networks, or micronets, are candidates to replace busses for processor component interconnect in future processor designs. For micronets...
Paul Gratz, Karthikeyan Sankaralingam, Heather Han...
SIGCOMM
2010
ACM
15 years 6 months ago
Design and implementation of an "approximate" communication system for wireless media applications
All practical wireless communication systems are prone to errors. At the symbol level such wireless errors have a well-defined structure: when a receiver decodes a symbol erroneou...
Sayandeep Sen, Syed Gilani, Shreesha Srinath, Step...
PDPTA
2003
15 years 7 months ago
Comparing Multiported Cache Schemes
The performance of the data memory hierarchy is extremely important in current and near future high performance superscalar microprocessors. To address the memory gap, computer de...
Smaïl Niar, Lieven Eeckhout, Koenraad De Boss...
CODES
2003
IEEE
15 years 11 months ago
Security wrappers and power analysis for SoC technologies
Future wireless internet enabled devices will be increasingly powerful supporting many more applications including one of the most crucial, security. Although SoCs offer more resi...
Catherine H. Gebotys, Y. Zhang
FPL
2003
Springer
144views Hardware» more  FPL 2003»
15 years 11 months ago
FPGA Implementations of Neural Networks - A Survey of a Decade of Progress
The first successful FPGA implementation [1] of artificial neural networks (ANNs) was published a little over a decade ago. It is timely to review the progress that has been made i...
Jihan Zhu, Peter Sutton