628 search results - page 110 / 126 » Designing the perfect auction |
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
FCCM
2004
IEEE
15 years 1 months ago
2004
IEEE
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
102
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DASFAA
2009
IEEE
15 years 25 days ago
2009
IEEE
Abstract. Fine-grained lock protocols with lock modes and lock granules adjusted to the various XML processing models, allow for highly concurrent transaction processing on XML tre...
89
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CODES
2008
IEEE
14 years 11 months ago
2008
IEEE
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
TWC
2008
14 years 9 months ago
2008
In wireless ad hoc networks, autonomous nodes are reluctant to forward others' packets because of the nodes' limited energy. However, such selfishness and noncooperation ...