The design of external index structures for one- and multidimensional extended objects is a long and well studied subject in basic database research. Today, more and more commercia...
Control independence has been put forward as a significant new source of instruction-level parallelism for future generation processors. However, its performance potential under p...
For maximum performance, an out-of-order processor must issue load instructions as early as possible, while avoiding memory-order violations with prior store instructions that wri...
Several industrial FPGA routing architectures have been shown to have no efficient routing algorithms (unless P=NP) [3,4]. Here, we further investigate if the intractability of th...
During the course of the last decade, a mathematical model for the parallelization of FOR-loops has become increasingly popular. In this model, a (perfect) nest of r FOR-loops is r...