43 search results - page 6 / 9 » Destructive-read in embedded DRAM, impact on power consumpti... |
DAC
2000
ACM
14 years 7 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
DATE
2010
IEEE
13 years 11 months ago
2010
IEEE
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
ISCA
2009
IEEE
14 years 29 days ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
DAC
2011
ACM
12 years 6 months ago
2011
ACM
DVFS remains an important energy management technique for embedded systems. However, its negative impact on transient fault rates has been recently shown. In this paper, we propos...
ICCAD
2009
IEEE
13 years 4 months ago
2009
IEEE
While Dynamic Voltage Scaling (DVS) remains as a popular energy management technique for real-time embedded applications, recent research has identified significant and negative i...