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GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
14 years 10 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...
ACSAC
1998
IEEE
15 years 2 months ago
Detecting Anomalous and Unknown Intrusions Against Programs
The ubiquity of the Internet connection to desktops has been both boon to business as well as cause for concern for the security of digital assets that may be unknowingly exposed....
Anup K. Gosh, James Wanken, Frank Charron
WISA
2005
Springer
15 years 3 months ago
Video Fingerprinting System Using Wavelet and Error Correcting Code
In this paper, we present a video fingerprinting system to identify the source of illegal copies. Content is distributed along a specified tree, with the seller as the root of the ...
Hyun-Ho Kang, Brian M. Kurkoski, Young-Ran Park, H...
DAC
2012
ACM
13 years 10 days ago
On software design for stochastic processors
Much recent research [8, 6, 7] suggests significant power and energy benefits of relaxing correctness constraints in future processors. Such processors with relaxed constraints ...
Joseph Sloan, John Sartori, Rakesh Kumar
VTS
2007
IEEE
203views Hardware» more  VTS 2007»
15 years 4 months ago
Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance Based SEC-DED-DAEC Code
Conventional error correcting code (ECC) schemes used in memories and caches cannot correct double bit errors caused by a single event upset (SEU). As memory density increases, mu...
Avijit Dutta, Nur A. Touba