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109
Voted
DATE
2005
IEEE
187views Hardware» more  DATE 2005»
15 years 6 months ago
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs
In this paper, the application of a cycle accurate binary translator for rapid prototyping of SoCs will be presented. This translator generates code to run on a rapid prototyping ...
Jürgen Schnerr, Oliver Bringmann, Wolfgang Ro...
98
Voted
DATE
2003
IEEE
94views Hardware» more  DATE 2003»
15 years 6 months ago
Platform-Based Testbench Generation
This paper presents a new technology that accelerates system verification. In a real life example, we achieved a speed-up of a factor of about 5000. The key for this speed-up is a...
Renate Henftling, Andreas Zinn, Matthias Bauer, Wo...
MJ
2011
288views Multimedia» more  MJ 2011»
14 years 7 months ago
Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling
New tendencies envisage 2D/3D Multi-Processor System-On-Chip (MPSoC) as a promising solution for the consumer electronics market. MPSoCs are complex to design, as they must execute...
Pablo Garcia Del Valle, David Atienza
126
Voted
SIAMCOMP
2010
105views more  SIAMCOMP 2010»
14 years 7 months ago
Fast Access to Distributed Atomic Memory
We study efficient and robust implementations of an atomic read-write data structure over an asynchronous distributed message-passing system made of reader and writer processes, as...
Partha Dutta, Rachid Guerraoui, Ron R. Levy, Marko...
128
Voted
WISES
2003
15 years 2 months ago
A Simulation Architecture for Time-Triggered Transducer Networks
— Steadily growing microcontroller capabilities at an ever decreasing cost per operation encourage the development of more extensive and smarter applications in the domain of emb...
Martin Schlager