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ITC
1998
IEEE
114views Hardware» more  ITC 1998»
15 years 9 months ago
BETSY: synthesizing circuits for a specified BIST environment
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...
Zhe Zhao, Bahram Pouya, Nur A. Touba
105
Voted
CVPR
1997
IEEE
15 years 9 months ago
Completion Energies and Scale
ÐThe detection of smooth curves in images and their completion over gaps are two important problems in perceptual grouping. In this study, we examine the notion of completion ener...
Eitan Sharon, Achi Brandt, Ronen Basri
162
Voted
AUSAI
1997
Springer
15 years 9 months ago
Integrated Correction of Ill-Formed Sentences
This paper describes a system that performs hierarchical error recovery, and detects and corrects a single error in a sentence at the lexical, syntactic, and/or semantic levels. I...
Kyongho Min, William H. Wilson
ITC
1994
IEEE
151views Hardware» more  ITC 1994»
15 years 9 months ago
Automated Logic Synthesis of Random-Pattern-Testable Circuits
Previous approaches to designing random pattern testable circuits use post-synthesis test point insertion to eliminate random pattern resistant (r.p.r.) faults. The approach taken...
Nur A. Touba, Edward J. McCluskey
131
Voted
ISSTA
1993
ACM
15 years 9 months ago
Faults on Its Sleeve: Amplifying Software Reliability Testing
Most of the effort that goes into improving the quality of software paradoxically does not lead to quantitative, measurable quality. Software developers and quality-assurance orga...
Richard G. Hamlet, Jeffrey M. Voas
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