: Clock networks account for a significant fraction of the power dissipation of a chip and are critical to performance. This paper presents theory and algorithms for building a low...
As the power consumption of modern highperformance microprocessors increases beyond 100W, power becomes an increasingly important design consideration. This paper presents a novel...
Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
— Multiple power supply voltages are often used in modern high performance ICs such as microprocessors to decrease power consumption without affecting circuit speed. The system o...
Multiple supply voltages, multiple transistor thresholds and transistor sizing could be used to reduce the power dissipation of digital blocks. This paper presents a framework for...