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ICASSP
2010
IEEE
15 years 2 months ago
A parallel point-process filter for estimation of goal-directed movements from neural signals
Brain machine interfaces work by mapping the relevant neural activity to the intended movement known as ‘decoding’. Here, we develop a recursive Bayesian decoder for goaldirec...
Maryam Modir Shanechi, Gregory W. Wornell, Ziv Wil...
APIN
1999
107views more  APIN 1999»
15 years 2 months ago
Massively Parallel Probabilistic Reasoning with Boltzmann Machines
We present a method for mapping a given Bayesian network to a Boltzmann machine architecture, in the sense that the the updating process of the resulting Boltzmann machine model pr...
Petri Myllymäki
TJS
2010
145views more  TJS 2010»
14 years 9 months ago
Analyzing and enhancing the parallel sort operation on multithreaded architectures
The Sort operation is a core part of many critical applications. Despite the large efforts to parallelize it, the fact that it suffers from high data-dependencies vastly limits it...
Layali K. Rashid, Wessam Hassanein, Moustafa A. Ha...
ISCAS
2002
IEEE
94views Hardware» more  ISCAS 2002»
15 years 7 months ago
A robust self-resetting CMOS 32-bit parallel adder
This paper presents new circuit configurationsfor a more robust and efficient form of self-resettingCMOS (SRCMOS). Prior structures for SRCMOS have very high performance but are...
Gunok Jung, V. A. Sundarajan, Gerald E. Sobelman
ACSAC
1999
IEEE
15 years 6 months ago
A Parallel Packet Screen for High Speed Networks
This paper demonstrates why security issues related to the continually increasing bandwidth of High Speed Networks (HSN) cannot be addressed with conventional firewall mechanisms....
Carsten Benecke