Sciweavers

5171 search results - page 501 / 1035
» Deterministic Parallel Processing
Sort
View
135
Voted
DIGRA
2005
Springer
15 years 10 months ago
Game Engineering for a Multiprocessor Architecture
This paper explores the idea that future game consoles and computers may no longer be single processor units, but instead symmetrical multiprocessor units. If this were to occur g...
Abdennour El Rhalibi, Steve Costa, David England
ISCAS
2003
IEEE
144views Hardware» more  ISCAS 2003»
15 years 10 months ago
A flexible global readout architecture for an analogue SIMD vision chip
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
Piotr Dudek
114
Voted
LCN
2003
IEEE
15 years 10 months ago
A holistic methodology for network processor design
The GigaNetIC project aims to develop high-speed components for networking applications based on massively parallel architectures. A central part of this project is the design, ev...
Olaf Bonorden, Nikolaus Brüls, Uwe Kastens, D...
CCGRID
2002
IEEE
15 years 9 months ago
Multiple Query Optimization for Data Analysis Applications on Clusters of SMPs
This paper is concerned with the efficient execution of multiple query workloads on a cluster of SMPs. We target applications that access and manipulate large scientific dataset...
Henrique Andrade, Tahsin M. Kurç, Alan Suss...
ISPAN
2002
IEEE
15 years 9 months ago
On Locality of Dominating Set in Ad Hoc Networks with Switch-On/Off Operations
Routing based on a connected dominating set is a promising approach, where the search space for a route is reduced to the hosts in the set. A set is dominating if all the hosts in...
Jie Wu, Fei Dai