5171 search results - page 634 / 1035 » Deterministic Parallel Processing |
220
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HPCC
2007
Springer
16 years 17 days ago
2007
Springer
Abstract. Even though there have been many research works on distributed deadlock detection and recovery mechanisms, the multi-cycle deadlock problems are not extensively studied y...
159
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PADL
2007
Springer
16 years 16 days ago
2007
Springer
Abstract. We describe a declarative language, called BAD (brain architecture description language), which we have developed for describing and then running brain models. Models are...
214
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CCGRID
2006
IEEE
16 years 14 days ago
2006
IEEE
— Geometric shape modeling becomes increasingly complex and resource-demanding task. In this paper we propose a method to leverage the power of Grid to provide users with high-pr...
144
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IPPS
2006
IEEE
16 years 13 days ago
2006
IEEE
In this paper an analysis of a dynamically reconfigurable processor is presented. The network processor incorporates a processor and a number of coprocessors that can be connected...
168
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IPPS
2006
IEEE
16 years 13 days ago
2006
IEEE
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...