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FPL
2001
Springer
101views Hardware» more  FPL 2001»
15 years 10 months ago
An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars
This paper presents an FPGA-based implementation of a syntactic parser that can process languages generated by almost unrestricted real-life context-free grammars (CFGs). More prec...
Cristian Ciressan, Eduardo Sanchez, Martin Rajman,...
153
Voted
SCCC
1998
IEEE
15 years 10 months ago
Dynamic Programming as Frame for Efficient Parsing
The last few years have seen a renewal of interest in the consideration of dynamic programming in compiler technology. This is due to the compactness of the representations, which...
Manuel Vilares Ferro, Miguel A. Alonso, David Cabr...
PADS
1998
ACM
15 years 10 months ago
Event History Based Sparse State Saving in Time Warp
This paper presents a sparse state saving scheme for Time Warp parallel discrete event simulation. The scheme bases the selection of the states to be recorded on the event history...
Francesco Quaglia
181
Voted
CHI
1997
ACM
15 years 10 months ago
Cognitive Modeling Reveals Menu Search is Both Random and Systematic
To understand how people search for a known target item in an unordered pull-down menu, this research presents cognitive models that vary serial versus parallel processing of menu...
Anthony J. Hornof, David E. Kieras
ASAP
1996
IEEE
145views Hardware» more  ASAP 1996»
15 years 10 months ago
A Synthesis System For Bus-Based Wavefront Array Architectures
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
Reiner W. Hartenstein, Jürgen Becker, Michael...