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GLVLSI
2003
IEEE
173views VLSI» more  GLVLSI 2003»
15 years 9 months ago
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
Michael I. Fuller, James P. Mabry, John A. Hossack...
IEEEPACT
2003
IEEE
15 years 9 months ago
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU
Graphics and media processing is quickly emerging to become one of the key computing workloads. Programmable graphics processors give designers extra flexibility by running a sma...
Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjee...
CONCUR
2003
Springer
15 years 9 months ago
Abstract Patterns of Compositional Reasoning
Patterns of Compositional Reasoning Nina Amla1 , E. Allen Emerson2 , Kedar Namjoshi3 , and Richard Trefler4 1 Cadence Design Systems 2 Univ. of Texas at Austin 3 Bell Labs, Lucent...
Nina Amla, E. Allen Emerson, Kedar S. Namjoshi, Ri...
CONCUR
2003
Springer
15 years 9 months ago
A Compositional Semantic Theory for Synchronous Component-based Design
Abstract. Digital signal processing and control (DSPC) tools allow application developers to assemble systems by connecting predefined components in signal–flow graphs and by h...
Barry Norton, Gerald Lüttgen, Michael Mendler
ECOOPW
2003
Springer
15 years 9 months ago
Modeling Variability for Object-Oriented Product Lines
The concept of a software product line is a promising approach for increasing planned reusability in industry. For planning future requirements, the integration of domain analysis ...
Matthias Riebisch, Detlef Streitferdt, Ilian Pasho...