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ICDCS
2009
IEEE
15 years 11 months ago
Pushing the Envelope: Extreme Network Coding on the GPU
While it is well known that network coding achieves optimal flow rates in multicast sessions, its potential for practical use has remained to be a question, due to its high compu...
Hassan Shojania, Baochun Li
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
15 years 11 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
108
Voted
ICCAD
2005
IEEE
114views Hardware» more  ICCAD 2005»
15 years 11 months ago
Double-gate SOI devices for low-power and high-performance applications
: Double-Gate (DG) transistors have emerged as promising devices for nano-scale circuits due to their better scalability compared to bulk CMOS. Among the various types of DG device...
Kaushik Roy, Hamid Mahmoodi-Meimand, Saibal Mukhop...
HICSS
2010
IEEE
185views Biometrics» more  HICSS 2010»
15 years 9 months ago
Concurrent Architecture for Automated Malware Classification
This paper introduces a new architecture for automating the generalization of program structure and the recognition of common patterns in the area of malware analysis. By using ma...
Timothy Daly, Luanne Burns
ASPLOS
2010
ACM
15 years 9 months ago
Accelerating the local outlier factor algorithm on a GPU for intrusion detection systems
The Local Outlier Factor (LOF) is a very powerful anomaly detection method available in machine learning and classification. The algorithm defines the notion of local outlier in...
Malak Alshawabkeh, Byunghyun Jang, David R. Kaeli