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93
Voted
IPPS
1998
IEEE
15 years 3 months ago
1998
IEEE
In this communication Simulated Annealing and Genetic Algorithms, are applied to the graph partitioning problem. These techniques mimic processes in statistical mechanics and biol...
DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
Test pattern decompression techniques are bounded with the algorithm of test pattern ordering and test data flow controlling. Some of the methods could have more sophisticated sor...
91
Voted
VLSID
2002
IEEE
16 years 1 days ago
2002
IEEE
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
107
Voted
ICCAD
1995
IEEE
15 years 3 months ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
98
Voted
ASPDAC
1998
ACM
15 years 3 months ago
1998
ACM
— Test Pattern Generation for combinational circuits entails the identification of primary input assignments for detecting each fault in a set of target faults. An extension to ...