115 search results - page 15 / 23 » Deterministic Test Pattern Generation Techniques for Sequent... |
DAC
1994
ACM
15 years 1 months ago
1994
ACM
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
COCO
2009
Springer
15 years 4 months ago
2009
Springer
—We show that the rank of a depth-3 circuit (over any field) that is simple, minimal and zero is at most O(k3 log d). The previous best rank bound known was 2O(k2 ) (log d)k−2...
105
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INTEGRATION
2006
14 years 9 months ago
2006
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
SAC
2008
ACM
14 years 9 months ago
2008
ACM
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed testing of high-speed embedded processors testing in an SoC system. For SBST, test rout...
64
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ITC
2000
IEEE
15 years 1 months ago
2000
IEEE
1 The term "functional BIST" describes a test method to control functional modules so that they generate a deterministic test set, which targets structural faults within ...