115 search results - page 18 / 23 » Deterministic Test Pattern Generation Techniques for Sequent... |
67
Voted
VTS
2003
IEEE
15 years 2 months ago
2003
IEEE
Reseeding is used to improve fault coverage in pseudo-random testing. Most of the work done on reseeding is based on storing the seeds in an external tester. Besides its high cost...
IOLTS
2000
IEEE
15 years 1 months ago
2000
IEEE
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
ITC
2000
IEEE
15 years 1 months ago
2000
IEEE
In this paper a new scheme for deterministic and mixed mode scan-based BIST is presented. It relies on a new type of test pattern generator which resembles a programmable Johnson ...
MEMOCODE
2007
IEEE
15 years 3 months ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
84
Voted
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...