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ICES
2000
Springer
140views Hardware» more  ICES 2000»
15 years 1 months ago
Evolving Cellular Automata for Self-Testing Hardware
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
GLVLSI
2005
IEEE
118views VLSI» more  GLVLSI 2005»
15 years 3 months ago
High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
Vishal Suthar, Shantanu Dutt
AAAI
2008
14 years 12 months ago
Computing Observation Vectors for Max-Fault Min-Cardinality Diagnoses
Model-Based Diagnosis (MBD) typically focuses on diagnoses, minimal under some minimality criterion, e.g., the minimal-cardinality set of faulty components that explain an observa...
Alexander Feldman, Gregory M. Provan, Arjan J. C. ...
DAC
2000
ACM
15 years 10 months ago
Power minimization using control generated clocks
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
M. Srikanth Rao, S. K. Nandy
DATE
2006
IEEE
99views Hardware» more  DATE 2006»
15 years 3 months ago
Multiple-fault diagnosis based on single-fault activation and single-output observation
In this paper, we propose a new circuit transformation technique in conjunction with the use of a special diagnostic test pattern, named SO-SLAT pattern, to achieve higher multipl...
Yung-Chieh Lin, Kwang-Ting Cheng