115 search results - page 4 / 23 » Deterministic Test Pattern Generation Techniques for Sequent... |
ITC
1994
IEEE
15 years 3 months ago
1994
IEEE
140
Voted
EVOW
1999
Springer
15 years 3 months ago
1999
Springer
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
99
Voted
DATE
1999
IEEE
15 years 3 months ago
1999
IEEE
A novel approach to testing sequential circuits that uses multi-level decision diagram representations is introduced. The proposed algorithm consists of a combination of scanning ...
DAC
1994
ACM
15 years 3 months ago
1994
ACM
Recent results indicate that functional test pattern generation (TPG) techniques may provide better defect coverages than do traditional logic-level techniques. Functional TPG alg...
108
Voted
VLSID
1997
IEEE
15 years 3 months ago
1997
IEEE
The problem of test generation belongs to the class of NP-complete problems and it is becoming more and more di cult as the complexity of VLSI circuits increases, and as long as e...