Sciweavers

47 search results - page 3 / 10
» Developing a Concurrent Methodology for Standard-Cell Librar...
Sort
View
DATE
2008
IEEE
118views Hardware» more  DATE 2008»
13 years 8 months ago
Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices
Advanced MOSFETs such as Strained Silicon (SS) devices have emerged as critical enablers to keep Moore's law on track for sub100nm technologies. Use of Strained Silicon devic...
Ashutosh Chakraborty, Sean X. Shi, David Z. Pan
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
14 years 1 months ago
An MDE methodology for the development of high-integrity real-time systems
—This paper reports on experience gained and lessons learned from an intensive investigation of model-driven engineering methodology and technology for application to high-integr...
Silvia Mazzini, Stefano Puri, Tullio Vardanega
MICRO
2007
IEEE
79views Hardware» more  MICRO 2007»
14 years 16 days ago
Self-calibrating Online Wearout Detection
Technology scaling, characterized by decreasing feature size, thinning gate oxide, and non-ideal voltage scaling, will become a major hindrance to microprocessor reliability in fu...
Jason A. Blome, Shuguang Feng, Shantanu Gupta, Sco...
CODES
2005
IEEE
13 years 12 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
ESCIENCE
2007
IEEE
14 years 18 days ago
Cross-Middleware Interoperability in Distributed Concurrent Engineering
Secure, distributed collaboration between different organizations is a key challenge in Grid computing today. The GDCD project has produced a Grid-based demonstrator Virtual Colla...
E. Rowland Watkins, Mark McArdle, Thomas Leonard, ...