188 search results - page 13 / 38 » Developing a Hardware Evaluation Method for SHA-3 Candidates |
69
Voted
IWEC
2008
14 years 11 months ago
2008
Recently, we have presented a comic generating system that visualizes an online-game play. Our system was inspired by a former work of Shamir et al. However, comics generated in th...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Soft errors are an increasingly serious problem for logic circuits. To estimate the effects of soft errors on such circuits, we develop a general computational framework based on ...
87
Voted
ISPD
1999
ACM
15 years 1 months ago
1999
ACM
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
59
Voted
ATS
1998
IEEE
15 years 1 months ago
1998
IEEE
This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional breadboarded prototype, (1) we used...
68
Voted
COMSWARE
2007
IEEE
15 years 3 months ago
2007
IEEE
— We present BARAKA, a new simulator for SANETs. The evaluation of algorithms developed for communication and co-operation in this context is usually accomplished separately. On ...