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ICCAD
2007
IEEE
116views Hardware» more  ICCAD 2007»
15 years 8 months ago
Device and architecture concurrent optimization for FPGA transient soft error rate
Late CMOS scaling reduces device reliability, and existing work has studied the permanent SER (soft error rate) for configuration memory in FPGA extensively. In this paper, we sh...
Yan Lin, Lei He
MICRO
1995
IEEE
125views Hardware» more  MICRO 1995»
15 years 3 months ago
Disjoint eager execution: an optimal form of speculative execution
Instruction Level Parallelism (ILP) speedups of an order-of-magnitude or greater may be possible using the techniques described herein. Traditional speculative code execution is t...
Augustus K. Uht, Vijay Sindagi, Kelley Hall
ICNP
2009
IEEE
15 years 6 months ago
Topological Detection on Wormholes in Wireless Ad Hoc and Sensor Networks
—Wormhole attack is a severe threat to wireless ad hoc and sensor networks. Most existing countermeasures either require specialized hardware devices or make strong assumptions o...
Dezun Dong, Mo Li, Yunhao Liu, Xiang-Yang Li, Xian...
CHARME
2005
Springer
176views Hardware» more  CHARME 2005»
15 years 5 months ago
An Analysis of SAT-Based Model Checking Techniques in an Industrial Environment
Abstract. Model checking is a formal technique for automatically verifying that a finite-state model satisfies a temporal property. In model checking, generally Binary Decision D...
Nina Amla, Xiaoqun Du, Andreas Kuehlmann, Robert P...
TELSYS
2008
99views more  TELSYS 2008»
14 years 11 months ago
Mote-based underwater sensor networks: opportunities, challenges, and guidelines
Most underwater networks rely on expensive specialized hardware for acoustic communication and modulation. This has impeded wide scale deployments of underwater sensor networks and...
Raja Jurdak, Antonio G. Ruzzelli, Gregory M. P. O'...