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» Developing an Open Architecture for Performance Data Mining
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113
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FCCM
1998
IEEE
149views VLSI» more  FCCM 1998»
15 years 6 months ago
Configuration Compression for the Xilinx XC6200 FPGA
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
Scott Hauck, Zhiyuan Li, Eric J. Schwabe
ICCSA
2007
Springer
15 years 8 months ago
FRASH: Hierarchical File System for FRAM and Flash
Abstract. In this work, we develop novel file system, FRASH, for byteaddressable NVRAM (FRAM[1]) and NAND Flash device. Byte addressable NVRAM and NAND Flash is typified by the DRA...
Eun-ki Kim, Hyungjong Shin, Byung-gil Jeon, Seokhe...
DATE
2003
IEEE
98views Hardware» more  DATE 2003»
15 years 7 months ago
Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol
System-on-chip (SoC) designs use bus protocols for high performance data transfer among the Intellectual Property (IP) cores. These protocols incorporate advanced features such as...
Abhik Roychoudhury, Tulika Mitra, S. R. Karri
121
Voted
IPPS
1999
IEEE
15 years 6 months ago
DynBench: A Dynamic Benchmark Suite for Distributed Real-Time Systems
In this paper we present the architecture and framework for a benchmark suite that has been developed as part of the DeSiDeRaTa project. The proposed benchmark suite is representat...
Behrooz Shirazi, Lonnie R. Welch, Binoy Ravindran,...
SSDBM
1998
IEEE
141views Database» more  SSDBM 1998»
15 years 6 months ago
Scientific Workflow Management by Database Management
In several working environments, production involves repeated executions of certain procedures. A workflow describes the individual tasks performed in these procedures and their i...
Anastassia Ailamaki, Yannis E. Ioannidis, Miron Li...