The problem of checking the equivalence of combinational circuits is of key significance in the verification of digital circuits. In recent years, several approaches have been pro...
Proving the equivalenceof two Finite State Machines (FSMs) has many applications to synthesis, verication, testing, and diagnosis. Building their product machine is a theoretical ...
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Pa...
Of special interest in formal verification are safety properties, which assert that the system always stays within some allowed region. A computation that violates a general linea...
Programmable networks offer the ability to customize router behaviour at run time, thus providing new levels of flexibility for network administrators. We have developed a program...
This paper presents novel language and analysis techniques that significantly speed up software model checking of data structure properties. Consider checking a red-black tree imp...