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FPGA
2005
ACM
137views FPGA» more  FPGA 2005»
15 years 2 months ago
HARP: hard-wired routing pattern FPGAs
Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...
Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia...
ICES
2005
Springer
138views Hardware» more  ICES 2005»
15 years 2 months ago
A Flexible On-Chip Evolution System Implemented on a Xilinx Virtex-II Pro Device
Abstract. There have been introduced a number of systems with evolvable hardware on a single chip. To overcome the lack of flexibility in these systems, we propose a single-chip e...
Kyrre Glette, Jim Torresen
ISCAS
2003
IEEE
118views Hardware» more  ISCAS 2003»
15 years 2 months ago
Embedded reconfigurable array targeting motion estimation applications
Motion estimation is a complex computation found in video compression algorithms, such as standards like MPEG-4 and H.263. This paper proposes an embedded reconfigurable array for...
Sami Khawam, Tughrul Arslan, Fred Westall
DAC
2005
ACM
15 years 10 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
ISLPED
2004
ACM
169views Hardware» more  ISLPED 2004»
15 years 2 months ago
Delay optimal low-power circuit clustering for FPGAs with dual supply voltages
This paper presents a delay optimal FPGA clustering algorithm targeting low power. We assume that the configurable logic blocks of the FPGA can be programmed using either a high s...
Deming Chen, Jason Cong