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ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
15 years 6 months ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
CASES
2006
ACM
15 years 1 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
CODES
2002
IEEE
15 years 2 months ago
Locality-conscious process scheduling in embedded systems
In many embedded systems, existence of a data cache might influence the effectiveness of process scheduling policy significantly. Consequently, a scheduling policy that takes in...
Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu,...
IPPS
2000
IEEE
15 years 2 months ago
A Requirements Analysis for Parallel KDD Systems
Abstract. The current generation of data mining tools have limited capacity and performance, since these tools tend to be sequential. This paper explores a migration path out of th...
William Maniatty, Mohammed Javeed Zaki
ETS
2007
IEEE
128views Hardware» more  ETS 2007»
14 years 11 months ago
Selecting Power-Optimal SBST Routines for On-Line Processor Testing
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
Andreas Merentitis, Nektarios Kranitis, Antonis M....