Sciweavers

410 search results - page 42 / 82
» Diagonal routing in high performance microprocessor design
Sort
View
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 3 months ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
NOCS
2010
IEEE
14 years 7 months ago
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...
89
Voted
SIGCOMM
2010
ACM
14 years 10 months ago
Symbiotic routing in future data centers
Building distributed applications for data centers is hard. CamCube explores whether replacing the traditional switchbased network with a directly connected topology makes it easi...
Hussam Abu-Libdeh, Paolo Costa, Antony I. T. Rowst...
61
Voted
GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
15 years 3 months ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...
74
Voted
SIMUTOOLS
2008
14 years 11 months ago
An OMNeT++ model for the evaluation of OBS routing strategies
Optical Burst Switching (OBS) has been proposed as a costeffective paradigm for supporting, with adequate flexibility, the increasingly high transmission capacity required by the ...
A. L. Barradas, M. C. R. Medeiros