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» Diagonal routing in high performance microprocessor design
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84
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DAC
2006
ACM
15 years 10 months ago
Novel full-chip gridless routing considering double-via insertion
As the technology node advances into the nanometer era, via-open defects are one of the dominant failures. To improve via yield and reliability, redundant-via insertion is a highl...
Huang-Yu Chen, Mei-Fang Chiang, Yao-Wen Chang, Lum...
PARELEC
2000
IEEE
15 years 1 months ago
Parallel Computing Environments and Methods
Recent advances in high-speed networks, rapid improvements in microprocessor design, and availability of highly performing clustering software implementations enables cost-effecti...
Ghassan Fadlallah, Michel Lavoie, Louis-A. Dessain...
64
Voted
SIGCOMM
2006
ACM
15 years 3 months ago
In VINI veritas: realistic and controlled network experimentation
This paper describes VINI, a virtual network infrastructure that allows network researchers to evaluate their protocols and services in a realistic environment that also provides ...
Andy C. Bavier, Nick Feamster, Mark Huang, Larry L...
MSWIM
2005
ACM
15 years 3 months ago
A swarm intelligent multi-path routing for multimedia traffic over mobile ad hoc networks
In the last few years, the advance of multimedia applications has prompted researchers to undertake the task of routing multimedia data through Manet. This task is rather difficul...
Saida Ziane, Abdelhamid Mellouk
93
Voted
INFOCOM
2011
IEEE
14 years 1 months ago
VIRO: A scalable, robust and namespace independent virtual Id routing for future networks
—In this paper we propose VIRO — a novel, virtual identifier (Id) routing paradigm for future networks. The objective is three-fold. First, VIRO directly addresses the challen...
Sourabh Jain, Yingying Chen, Zhi-Li Zhang