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IPPS
1999
IEEE
15 years 4 months ago
Reducing I/O Complexity by Simulating Coarse Grained Parallel Algorithms
Block-wise access to data is a central theme in the design of efficient external memory (EM) algorithms. A second important issue, when more than one disk is present, is fully par...
Frank K. H. A. Dehne, David A. Hutchinson, Anil Ma...
ICDE
2007
IEEE
145views Database» more  ICDE 2007»
16 years 1 months ago
Fast Identification of Relational Constraint Violations
Logical constraints, (e.g., 'phone numbers in toronto can have prefixes 416, 647, 905 only'), are ubiquitous in relational databases. Traditional integrity constraints, ...
Amit Chandel, Nick Koudas, Ken Q. Pu, Divesh Sriva...
CODES
2003
IEEE
15 years 5 months ago
Accurate estimation of cache-related preemption delay
Multitasked real-time systems often employ caches to boost performance. However the unpredictable dynamic behavior of caches makes schedulability analysis of such systems difficul...
Hemendra Singh Negi, Tulika Mitra, Abhik Roychoudh...
EICS
2009
ACM
15 years 4 months ago
StateStream: a developer-centric approach towards unifying interaction models and architecture
Complex and dynamic interaction behaviors in applications such as Virtual Reality (VR) systems are difficult to design and develop. Reasons for this include the complexity and lim...
Gerwin de Haan, Frits H. Post
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
15 years 4 months ago
Modeling design constraints and biasing in simulation using BDDs
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller,...