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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
15 years 6 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
ICCS
2005
Springer
15 years 7 months ago
Computational Modeling of Human Head Conductivity
A multi-cluster computational environment with mixed-mode (MPI + OpenMP) parallelism for estimation of unknown regional electrical conductivities of the human head, based on realis...
Adnan Salman, Sergei Turovets, Allen D. Malony, Je...
DAC
1999
ACM
16 years 2 months ago
Effects of Inductance on the Propagation Delay and Repeater Insertion in VLSI Circuits
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
Yehea I. Ismail, Eby G. Friedman
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
15 years 6 months ago
Repeater insertion in RLC lines for minimum propagation delay
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
Yehea I. Ismail, Eby G. Friedman
ICIP
2003
IEEE
16 years 3 months ago
Statistical atlas-based sub-voxel segmentation of 3D brain MRI
We present a 3D brain MRI segmentation method in which a high resolution label image evolves under the influence of multiple constraints. The constraints are expressed in a versat...
Marcel Bosc, Fabrice Heitz, Jean-Paul Armspach