Sciweavers

613 search results - page 14 / 123
» DiffServ over Network Processors: Implementation and Evaluat...
Sort
View
DATE
2007
IEEE
185views Hardware» more  DATE 2007»
15 years 4 months ago
An ILP formulation for system-level application mapping on network processor architectures
Current day network processors incorporate several architectural features including symmetric multi-processing (SMP), block multi-threading, and multiple memory elements to suppor...
Christopher Ostler, Karam S. Chatha
JGO
2010
89views more  JGO 2010»
14 years 8 months ago
Iterative regularization algorithms for constrained image deblurring on graphics processors
Abstract The ability of the modern graphics processors to operate on large matrices in parallel can be exploited for solving constrained image deblurring problems in a short time. ...
Valeria Ruggiero, Thomas Serafini, Riccardo Zanell...
61
Voted
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
15 years 4 months ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...
JNW
2007
107views more  JNW 2007»
14 years 9 months ago
Evaluating Performance Characteristics of SIP over IPv6
— Due to the ongoing massive growth of the global Internet, the rising integration of Voice over IP (VoIP) services and the Fixed Mobile Convergence (FMC), the IPv6 protocol and ...
Thomas Hoeher, Martin Petraschek, Slobodanka Tomic...
SENSYS
2006
ACM
15 years 3 months ago
The design and implementation of a self-calibrating distributed acoustic sensing platform
We present the design, implementation, and evaluation of the Acoustic Embedded Networked Sensing Box (ENSBox), a platform for prototyping rapid-deployable distributed acoustic sen...
Lewis Girod, Martin Lukac, Vlad Trifa, Deborah Est...