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GLOBECOM
2007
IEEE
15 years 3 months ago
GMPLS-Based Hybrid 1+N Link Protection Over p-Cycles: Design and Performance
—In [1], the author introduced a strategy to use network coding on p-Cycles in order to provide 1+N protection for straddling connections and links against single link failures i...
Ahmed E. Kamal
CLUSTER
2006
IEEE
15 years 3 months ago
A Parallel Algorithm for the Solution of the Deconvolution Problem on Heterogeneous Networks
In this work we present a parallel algorithm for the solution of a least squares problem with structured matrices. This problem arises in many applications mainly related to digit...
Pedro Alonso, Antonio M. Vidal, Alexey L. Lastovet...
JCP
2008
119views more  JCP 2008»
14 years 9 months ago
Performance Comparisons, Design, and Implementation of RC5 Symmetric Encryption Core using Reconfigurable Hardware
With the wireless communications coming to homes and offices, the need to have secure data transmission is of utmost importance. Today, it is important that information is sent con...
Omar S. Elkeelany, Adegoke Olabisi
RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
15 years 4 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
70
Voted
DATE
2010
IEEE
124views Hardware» more  DATE 2010»
15 years 2 months ago
Control network generator for latency insensitive designs
—Creating latency insensitive or asynchronous designs from clocked designs has potential benefits of increased modularity and robustness to variations. Several transformations h...
Eliyah Kilada, Kenneth S. Stevens