613 search results - page 36 / 123 » DiffServ over Network Processors: Implementation and Evaluat... |
WWW
2004
ACM
15 years 10 months ago
2004
ACM
This paper provides an objective evaluation of the performance impacts of binary XML encodings, using a fast stream-based XQuery processor as our representative application. Inste...
HPCA
2005
IEEE
15 years 3 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
71
Voted
ICDE
2005
IEEE
15 years 3 months ago
2005
IEEE
We pose the question: how do we efficiently evaluate a join operator, distributed over a heterogeneous network? Our objective here is to optimize the delay of output tuples. We di...
67
Voted
ICCCN
2007
IEEE
15 years 4 months ago
2007
IEEE
—Signaling protocols for GMPLS networks have been standardized and implemented in switch controllers. Most switch vendors allow for signaling messages to be carried over inband s...
69
Voted
FCCM
2009
IEEE
15 years 4 months ago
2009
IEEE
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...