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EUROPAR
2010
Springer
14 years 10 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
15 years 4 months ago
Late-binding: enabling unordered load-store queues
Conventional load/store queues (LSQs) are an impediment to both power-efficient execution in superscalar processors and scaling to large-window designs. In this paper, we propose...
Simha Sethumadhavan, Franziska Roesner, Joel S. Em...
DSN
2007
IEEE
15 years 4 months ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...
COOPIS
2004
IEEE
15 years 1 months ago
Evaluation of a Group Communication Middleware for Clustered J2EE Application Servers
Abstract. Clusters have become the de facto platform to scale J2EE application servers. Each tier of the server uses group communication to maintain consistency between replicated ...
Takoua Abdellatif, Emmanuel Cecchet, Renaud Lachai...
ICDE
2003
IEEE
209views Database» more  ICDE 2003»
15 years 11 months ago
An Evaluation of Regular Path Expressions with Qualifiers against XML Streams
This paper presents SPEX, a streamed and progressive evaluation of regular path expressions with XPath-like qualifiers against XML streams. SPEX proceeds as follows. An expression...
Dan Olteanu, François Bry, Tobias Kiesling