613 search results - page 94 / 123 » DiffServ over Network Processors: Implementation and Evaluat... |
156
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FPL
2009
Springer
15 years 10 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
146
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CGO
2008
IEEE
15 years 7 months ago
2008
IEEE
Data-flow analysis is an integral part of any aggressive optimizing compiler. We propose a framework for improving the precision of data-flow analysis in the presence of complex c...
180
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TVLSI
2008
15 years 5 months ago
2008
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
162
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SPIN
2007
Springer
15 years 11 months ago
2007
Springer
Abstract. Computational resources are increasing rapidly with the explosion of multi-core processors readily available from major vendors. Model checking needs to harness these res...
167
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ICS
2005
Tsinghua U.
15 years 11 months ago
2005
Tsinghua U.
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...