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CODES
2004
IEEE
15 years 1 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
ATMOS
2008
139views Optimization» more  ATMOS 2008»
14 years 11 months ago
Efficient On-Trip Timetable Information in the Presence of Delays
Abstract. The search for train connections in state-of-the-art commercial timetable information systems is based on a static schedule. Unfortunately, public transportation systems ...
Lennart Frede, Matthias Müller-Hannemann, Mat...
EUROPAR
2010
Springer
14 years 10 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
TIT
2008
92views more  TIT 2008»
14 years 9 months ago
Successive Refinement for Hypothesis Testing and Lossless One-Helper Problem
Abstract--We investigate two closely related successive refinement (SR) coding problems: 1) In the hypothesis testing (HT) problem, bivariate hypothesis H0 : PXY against H1 : PXPY ...
Chao Tian, Jun Chen
TNN
2008
178views more  TNN 2008»
14 years 9 months ago
IMORL: Incremental Multiple-Object Recognition and Localization
This paper proposes an incremental multiple-object recognition and localization (IMORL) method. The objective of IMORL is to adaptively learn multiple interesting objects in an ima...
Haibo He, Sheng Chen