Modelling activities in molecular biology face the difficulty of prediction to link molecular knowledge with cell phenotypes. Even when the interaction graph between molecules is k...
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
Abstract. In this paper we consider a class of hybrid stochastic games with the piecewise openloop information structure. These games are indexed over a parameter which represents...
We present a peer-to-peer service management middleware that dynamically allocates system resources to a large set of applications. The system achieves scalability in number of no...
Constantin Adam, Rolf Stadler, Chunqiang Tang, Mal...